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tongbu
使用VERILOG开发时钟同步算法,能够从数据信号中提取时钟信息,(Clock synchronization algorithm using VERILOG developed to extract the clock from the data signal information,)
- 2020-11-11 12:39:44下载
- 积分:1
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FPGA
基于FPGA的多功能波形发生器,很好的,使用Verilong程序。(FPGA-based multi-function waveform generator, a good use of Verilong program.)
- 2011-05-20 18:23:40下载
- 积分:1
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traffic_lights
用Verilog实现的交通信号灯控制,主干道和支路通行的时间不相等(Using Verilog implementation of traffic signal control, the trunk road and the slip is not the same passage of time)
- 2009-03-28 18:31:31下载
- 积分:1
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PCI-based--DSG
基于PCI的数字信号发生器
关键词:PCI总线,PCI9054,FPGA,卡尔曼滤波器(PCI-based digital signal generator
Keywords: PCI bus, PCI9054, FPGA, Kalman filter)
- 2016-06-12 20:41:45下载
- 积分:1
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XAPP_585
XAPP585 serdes_1_to_7 and serdes_7_to_1 data
- 2021-02-04 13:49:57下载
- 积分:1
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FPGAm序列发生器
以DE2板子为开发平台,采用Verilog语言编程,实现了跳频通信中常用的扩频序列m编码的输出,设计采用Modelsim以及Quartus II自带逻辑分析仪验证设计的正确性,此设计已经用在某工程中,测试结果性能良好。
- 2022-02-14 04:13:22下载
- 积分:1
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sapis
SAPIS doc : SATA interface
- 2017-07-16 15:59:06下载
- 积分:1
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sdio_slave
SDIO slave verilog code
- 2021-03-26 15:39:13下载
- 积分:1
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扰码器Verilog
实现扰码的功能,主要为64位在pcs子层传输的扰码器设计(To achieve the functions of scrambling code)
- 2020-10-17 17:27:27下载
- 积分:1
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cic_compensating
CIC 补偿滤波器。采用两种方法来设计,一个是frequency sampling method。另一个是Equal Rippler Design Method。这是一个非常有用的matlab代码。(CIC compensation filter. Two ways to design a frequency sampling method. The other is an Equal Rippler Design Method. This is a very useful matlab code.)
- 2012-10-17 14:22:08下载
- 积分:1