跑马灯

利用拨码开关控制液晶显示器进行十进制数字显示。(DIP switches control the use of liquid crystal display to decimal figures.)

Verilog实现高速AD7606数据采样，8通道，采样频率可调，支持串口数据发送，亲测可用。(Verilog AD7606 high-speed data sampling, 8-channel, the sampling frequency is adjustable, support for serial data transmission, pro-test is available.)

给出了SVPWM算法的详细FPGA实现方法！(A detailed FPGA SVPWM algorithm to achieve the method!)

vhdl very good debug release vhdl very good debug release

说明：  实现中采用 Verilog HDL 描述、 ModelSim 进行功能仿真、 Quartus II 进行逻辑综合和适配下载(Design of table tennis game machine)

Verilog HDL数字系统设计项目，频率可调的任意波形发生器，可以输出正弦波、方波、三角波和反三角四种波形(Verilog HDL digital system design projects, adjustable frequency arbitrary waveform generator can output sine wave, square wave, triangle wave and the anti-triangular four waveform)

用VHDL语言编程完成数码管0-255数字的显示-VHDL language programming with the 0-255 number to complete the display of the digital control

Spartan 3e - Active Power Meter-Spartan 3e- Active Power Meter

主要编写了一组二进制数据通过根升余弦滤波器后的波形，但并没有使用ISE内部的FIR滤波器内核，该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)

计算机组成原理课程设计代码，课程设计，计组(Computer organization principle curriculum design code, curriculum design, group calculation)