Golden Week Ligong Verilog HDL reference guide, learning VerriLog things.

mc8051 很好的学习资料 官网的绝对权威-mc8051 a good learning materials in absolute authority of the official website

说明：  verilog编写的RS485读写驱动程序(RS485 read-write driver written by Verilog)

FPGA代码，包含地址译码模块、16位锁存器、AD片选、死区及滤除窄脉冲、过流和短路保护、解除脉冲封锁模块、PWM模块、PWM选择 (FPGA code, including the address decoder module 16 latches, AD chip select, filter out the dead and narrow pulse, overcurrent and short circuit protection, lifting the blockade pulse module, PWM module, PWM selection)

快速实现HDB3码与普通码二进制码的转换，方便学习与了解HDB3码的转换(Quickly achieve HDB3 code and common code binary code conversion, facilitate learning and understanding HDB3 code conversion)

FIFO的verilog描述(Verilog description of the FIFO)

本例程位于 VMD642_CPLD目录中。 使用 CPLD 实现辅助译码、LED 指示灯控制、看门狗等各种逻辑控制电路。源程序使 用 Verilog HDL书写，编译开发系统使用 Cypress公司的 Warp 6.3。(This routine is located VMD642_CPLD directory. Using CPLD implementation auxiliary decoding, LED indicator control, watchdog, and other logic control circuitry. Written using Verilog HDL source code, the compiler development system using Cypress' s Warp 6.3.)

lcd verilog hdl 源码 可以直接使用，适用modelsim-lcd verilog HDL source

预失真算法中，包络解波部分的verilog代码，有部分错误(envelope calculation of DPD algorithm ，verilong HDL language)

半加器