SOPC软件编程基础，用实例讲解，非常适合初学者。

基于高清视频的3D人脸识别源代码，四万多行，经过FPGA实际验证，最近调试完毕。(The source code of 3D face recognition based on HD video, more than 40,000 lines, has been verified by the actual FPGA, and has been debugged recently.)

This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM. The core acts as a slave WISHBONE device. The output is perfectly compatible with any sound player with the IMA ADPCM codec (included by default in every Windows). Includes a testbench that takes an uncompressed PCM 16 bits Mono WAV file and outputs an IMA ADPCM compressed WAV file. Compression ratio is fixed for IMA-ADPCM, being 4:1. PLEASE NOTICE THAT THIS CORE IS LICENSED UNDER http://creativecommons.org/licenses/by-nc-sa/3.0/ (Creative Commons Attribution-Noncommercial-Share Alike 3.0 Unported). That means you may use it only for NON-COMMERCIAL purposes.

说明：  基于VHDL出租车的设计，实现开动、停止的收费功能。(VHDL-based cab design, implementation and running, stop the charging function.)

alu 模块，算术逻辑单元，实现简单的控制模块，有最基本的几条指令-alu instruction

xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。(The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing Warfare and Xilinx solutions, but also explains how to use Xilinx Software tools and hardware-proven reference designs to be for your own With (from low-cost DDR SDRAM applications to such as 667 Mb/s This higher performance DDR2 SDRAM interface) design a complete deposit Storage device interface solution.)

Vending Machine simulation using Moore sequence

matlab仿真MATLAB电机仿真精华50例--源代码异步电机\asymotor_stator.mdl

轴系测试程序，多通道输入输出，实现时域、频域、轴心轨迹、瀑布图等功能。(Shafting test program, multi-channel input and output, to achieve time domain, frequency domain, orbit, waterfall and other functions.)

用VerilogHDL写的spi 核的例子(A simple example of SPI core using Verilog HDL)

本代码用verilog语言配合sopc和nios实现了串口调试的目的。软件编程用C语言描述，只是比较简单的例子，适合初学者做了解用，本人亲自在EP2C8Q上实践。(The code to use verilog language sopc and nios achieved with serial debugging purposes. Software programming using C language description, but relatively simple example for beginners to do with understanding, I personally EP2C8Q on practice.)