登录
首页 » VHDL » This document is formatted UltraEdit document describes some of the original Ult...

This document is formatted UltraEdit document describes some of the original Ult...

于 2022-09-16 发布 文件大小:31.16 kB
0 203
下载积分: 2 下载次数: 1

代码说明:

这个文件中是UltraEdit的一些格式化文件说明 由于原来的 UltraEdit 不支持 HDL 语言的格式化显示,把文件解压得到的 wordfile.txt替换其安装目录下的 wordfile.txt 文件即可-This document is formatted UltraEdit document describes some of the original UltraEdit as a result of HDL does not support formatting language shows that the document received decompression wordfile.txt replace its installation directory under the document can wordfile.txt

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • failed to translate
    用于FPGA实现单总线测温电阻DS18b20时序。在xilinx spartan 3中试过。-failed to translate
    2022-01-20 22:48:28下载
    积分:1
  • 基于alteraCPLD芯片的VHDL点阵滚动显示源代码
    基于alteraCPLD芯片的VHDL点阵滚动显示源代码-VHDL-based alteraCPLD chip dot matrix rolling display the source code
    2022-04-25 07:41:48下载
    积分:1
  • 硬件设计vhdl_cpu1,1。您可以复制和分发该副本…
    硬件设计vhdl_cpu1,1. You may copy and distribute verbatim copies of this core, as long -- as this file, and the other associated files, remain intact and -- unmodified. Modifications are outlined below.-hardware design vhdl_cpu1, 1. You may copy and distribute verbatim copies of this core, as long-- as this file, and the other associated files, remain intact and-- unmodified. Modifications are outlined below.
    2022-02-06 23:06:37下载
    积分:1
  • LMS_filter
    这是自适应滤波器,使用verilog代码来编写的,已通过了仿真,效果很好。希望能给大家好好分享!(This adaptive filter verilog code to write, through a simulation, with good results. I hope to give a good share!)
    2020-12-08 21:19:19下载
    积分:1
  • Escalimetro
    all funtions for a scale meter for maps in a 8051 microcontroler with an alphanumeric lcd display
    2012-12-25 02:14:17下载
    积分:1
  • 彩条产生程序 color_bar
    说明:  彩条产生程序。。。。720p需添加74.25M时钟(colorbar generation. need 74.25mhz clock if 720p gen)
    2020-06-22 06:20:01下载
    积分:1
  • Continuous_acoustic_emission_board
    多通道连续声发射数据采集,每个通道最大5M,采用verilog编程,内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)
    2020-06-25 13:00:01下载
    积分:1
  • 16QAM
    QAM调制模块,可用于Quartus仿真与fpga硬件实现。(QAM Modulation Mode, can be used for Quartus simulation and FPGA.)
    2013-12-27 10:01:48下载
    积分:1
  • ADPCM(1)
    adpcm .c程序代码,完整,通过编译仿真(ADPCM c program code, complete compiled simulation)
    2013-04-17 17:07:54下载
    积分:1
  • ultractr源码,XPS技术,基于PPC平台
    ULTRACTR的源码,xps工程实现,基于PPC平台-ULTRACTR source code, xps engineering, based on the PPC platform
    2022-01-28 09:49:38下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载