闩锁、 人字拖鞋和记数器-DE2-115

说明：  ds18b20的Verilog程序，经测试验证可以使用。注意此版本为DALLS DS18B20而不是DS1820,注意加5K上拉电阻。(ds18b20 the Verilog process can be used to verify by testing. Note that this version rather than DALLS DS18B20 for DS1820, the attention of Canadian 5K pull-up resistor.)

黑金开发板对时钟信号的编写实验以及调试，相关代码如压缩包所示(CLOCK FPGA)

说明：  电子工程师学习的最好的学习资料，能够了解电子设计必学软件资料。建议珍藏，电子设计初学者必备(Electronic engineers to learn the best learning materials, to understand the electronic design will learn software data. Recommended collection, electronic design for beginners)

自己收集的VHDL例程代码，适合初学者学习用，希望能给大家带来帮助。-Collected their own routines VHDL code, suitable for beginners to learn, I hope we can help.

说明：  offset_cancellation code for matlab to hdl

hdlc协议的封装与解析，fsc校验，完整的例程代码(Decode and Encode an HDLC packet ，using FCS16 calculation)

由忆阻器机制设计蕴含逻辑，内含testbench仿真文件(Design implied logic by memristor mechanism, including testbench simulation file)

用于编码器计数，速度能够达到5ms/1圈，速度很快，而且杂波也很好，能够准确应用。已应用在工程中很多年

自己编写的红外解码子程序，但CPU资源占用较高，作教学示范用途。(prepared their infrared decoding routines, but higher occupancy CPU resources for teaching demonstration purposes.)

pll(phase locked loop) is used to fix the circuit to particular frequency