供大家学习以太网VHDL和Verilog代码

包括VHDL、verilog在内的各种设计实例，是学习硬件描述语言的帮手。共有82个实验例子，涉及各种语法规则。-82 VHDL, verilog test case, involving a variety of grammatical rules. which is you learn the HDL language helper.

基于有限状态机的健壮性测试研究。 关键词：健壮性测试；增强有限状态机；全球平台；安全通道协议(The Research of Robustness Testing Based on FSM)

测量周期,此程序已经在EP2C板子上成功实现(mesure cycle)

一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)

FPGA的fifo与dsp的emif接口测试程序(EMIF interface test program for FIFO and DSP of FPGA)

基于SystemC的Uart模型-----文档(SystemC the Uart model of----- document)

键盘接口电路的一个工程---包括vhdl源程序和编译后产生的相关文件-Keyboard interface circuit of a project--- including VHDL source code and compile the relevant documents after

Based on the verilog such as frequency meter accuracy, except for measuring frequency can also measure pulse width of empty measure than 32 counts of data through the simulation SPI serial output to SCM processing and display

基于分裂基的蝶型FFT，用C实现，经过测试，没有错误，可以直接拿去使用。(Based on the division of FFT butterfly type, use C implementation, tested, no error, can directly use. )

matlab代码，利用Farrow结构设计分数延时滤波器，滤波器阶数和个数可分别进行设置，利用最大最小准则近似(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)