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Altera-LVDS_IP
自己总结的Altera_LVDS的IP核的设计及仿真分析,已在实际工程中应用到,并且带有源代码和仿真代码,总结的文档,非常有用。(My summary of the Altera_LVDS IP kernel design and simulation analysis, has been applied in practical engineering, and with source code and simulation code, summary of the document, very useful.)
- 2020-12-16 14:39:13下载
- 积分:1
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shuzizhongsheji
有用的数字钟设计文档,有秒表、闹钟等模块,希望对大家有用!(JUST LEARN FROM IT!!ENJOY!)
- 2013-07-18 11:02:24下载
- 积分:1
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MAX531串行DA芯片的VHDL驱动,我应经在实际工程中试验过!
MAX531串行DA芯片的VHDL驱动,我应经在实际工程中试验过!-MAX531 serial DA chip VHDL driver, I shall be in the actual project tested!
- 2022-02-05 14:43:19下载
- 积分:1
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ed2_prac5_conta_finfin
program in hdl that this open mind in digital resources
- 2009-06-27 08:08:08下载
- 积分:1
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piano_final
ASK,FSK,PSK,DPSK调制解调的详细仿真代码(ASK, FSK, PSK, DPSK modulation and demodulation detailed simulation code)
- 2021-02-26 16:49:37下载
- 积分:1
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Synopsys 帮助文件 version 200205
Synopsys 帮助文件 version 200205-Synopsys sold version 200205
- 2023-08-02 16:20:05下载
- 积分:1
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4x4 electronic locks central control system. Six input control.
4X4电子密码锁的中央控制系统。控制6位输入。-4x4 electronic locks central control system. Six input control.
- 2022-02-10 10:06:12下载
- 积分:1
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FPGA_AD7822
基于FPGA的AD转换控制器设计,AD7822,quartus II,verilog hdl(A Design of the A/D Convertion Control Module Based on FPGA)
- 2011-08-26 15:06:18下载
- 积分:1
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sobel
在FPGA中,采用verilog HDL语言实现图像处理算法sobel,仿真实验通过(In the FPGA using verilog HDL language image processing algorithms sobel, simulation experiment)
- 2021-01-15 20:58:46下载
- 积分:1
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wishbone
wishbone接口的设计,在交换机和MAC之间建立wishbone接口(the wishbone interface design, wishbone interface between the switch and MAC)
- 2012-12-05 12:22:24下载
- 积分:1