How to Connecting Xilinx FPGAs to the Philips

说明：  Verilog语法教程，适合初学者，详细(Verilog instruction book)

带同步复位信号的二分频VHDL 程序-synchronous reset signal with the two-frequency VHDL procedures

串联型有源电力滤波器的 PSCAD仿真，能检测到谐波电压，本仿真的优势是能针对电压跌落或者升高进行自动补偿。(PSCAD simulation of Series type APF (Active Power Filter),this project can dectect the drop of voltage and compensates auomaticly.)

FPGA中嵌入8051的核 并且实现控制128*64的液晶显示-FPGA embedded in 8051 and to achieve control of the nuclear 128* 64 LCD

Verilog for SPI Core source code

flii adder wave form 3

dds 频率可控，32位 输出为12位 已含有.hex文件，直接装载致ROM即可~(dds frequency-controlled, 32-bit output is 12 already contains. hex file can be loaded directly caused ROM ~)

基于无源蜂鸣器和矩阵按键的电子琴系统设计(design of Electronic Piano System Based on Passive Buzzer and Matrix Key)

SDIO slave, written in verilog, does not support SPI mode.

4*4按键扫描电路，用数码管显示0~F，基于VHDL语言设计，包括按键扫描，数码管扫描，数码管显示，按键消抖等代码