ROM建立平方电路

基于DE2-115开发板设计的一个数字钟，能进行正常的小时、分、秒计时功能，并分别由开发板上面的数码管显示秒（60s）、分（60min）、小时（24hours）的时间。并具有手动调整时间的功能(DE2-115 board design based on a digital clock, and enables the normal hours, minutes, seconds chronograph function, and were above the development board digital display seconds (60s), points (60min), hours (24hours) time . And has a function to manually adjust the time)

用verilog语言实现基于DDS技术的余弦信号发生器，其输出位宽为16比特(Verilog language cosine signal generator based on DDS technology, the output bit width is 16 bits)

说明：  高速流水的SDRAM控制器，最高速度可达速度在200M左右(high speed SDRAM controller)

在FPGA内使用PID算法反馈控制小车速度和方向，四电机独立(PID algorithm within the FPGA using feedback control the car speed and direction, four independent motors)

基于FPGA cyclone2的偶数分频模块，可实现自定义分频数(Based on FPGA cyclone2 even number of frequency divider module, custom frequency divider can be realized.)

串口通信例程，使用FIFO数据缓存。Verilog源码，基于FPGA的uart开发，加深理解。(uart communication)

saa7113_配置.SAA7113视频解码系列芯片的一种，8位彩色配置(saa7113_ configuration. SAA7113 video decoder chips in an 8-bit color configuration)

这是一个用结构化语言编写的25抽头LMS算法建模.VHDL加法器/减法器、乘法器、延迟元件的代码分别编写并用LMS代码实例化。

用VHDL语言编写的AT24C02程序，并用数码管显示，本程序已经经过本人测试过，很好用-The AT24C02 is available VHDL language program, and use digital tube display, this procedure has been tested himself, very good to use--

基于fpga和51单片机的等精度频率计，通过fpga对信号进行采集，数据传给单片机计算，再由12864进行显示，可进行频率，周期，脉宽，占空比，幅值等的测量。(Fpga and 51 microcontroller based precision frequency meter, through fpga for signal acquisition, data to the microcontroller to calculate, and then by 12864 for display, can be measured frequency, period, pulse width, duty cycle, the amplitude and the like.)