Distributed arithmetic

说明：  matlab bpsk with rayleigh performance expirement

16 bit switch input view in hexa format on 7seg display

cycloneII Quartus verilog开发的简单时序电路-cycloneII Quartus verilog to develop a simple sequential circuit

本文档对quartus与modelsim运用操作描述十分详细，对初学者，会有很大帮助！(Quartus and modelsim this document on the use of operations described in great detail, for beginners, there will be a great help!)

关于XILINX FPGA 内部 中文培训教材-XILINX FPGA on internal training materials in Chinese

this is fpga based vhdl coding and report for wavlet based image compression in vhdl

基于FPGA的JPEG解码，对开发图片解码的人有用。(FPGA-based JPEG decoding, the development of image decoding useful.)

本代码绝对真实可靠，原用于长沙理工大学EDA课程设计之出租车计费器。本代码在要求的基础上添加显示时速和报警功能。希望此代码对有此需求的同学有所帮助！

利用ANSYS有限元仿真软件对复合材料进行异常检测仿真实验，程序为一损伤样板模型(ANSYS finite element simulation software for composites simulation anomaly detection, the program is a damage model model)

quick reference guide to verilog HDL