登录
首页 » VHDL » MAX+plus II编译的模30加法计数器,简单的与非门组成!

MAX+plus II编译的模30加法计数器,简单的与非门组成!

于 2022-04-18 发布 文件大小:13.50 kB
0 192
下载积分: 2 下载次数: 1

代码说明:

MAX+plus II编译的模30加法计数器,简单的与非门组成!-MAX+ Plus II compiler module adder 30 counters, a simple composition with the non-door!

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • Classic_Manual_Verilog_programming_language
    Verilog编程语言经典手册Classic Manual Verilog programming language(Verilog programming language classic manual Classic Manual Verilog programming language)
    2010-07-30 09:31:49下载
    积分:1
  • CY7C68013A_board_test
    该资料基于FPGA实现USB2.0的高速传输,即CY7C68013A芯片的数据传输,包括FPGA与上位机之间数据的相互传输,CY7C68013A的传输速率最高可达480M/S。(The FPGA-based high-speed data transmission USB2.0, that CY7C68013A chip data transmission, including the mutual transmission of data between the FPGA and the host machine CY7C68013A transfer rate up to 480M/S.)
    2020-08-24 21:48:15下载
    积分:1
  • weifen-program
    基于FPGA微分程序代码及其电路驱动程序(Based on FPGA differential program )
    2011-12-19 12:17:59下载
    积分:1
  • ppm_tb
    PPM编码器的测试文件,可以测试PPM编码是否正确(PPM encoder test file, you can test whether the correct PPM encoding)
    2013-11-20 12:32:16下载
    积分:1
  • cnt6
    verilog实现的“六进制约翰逊计数器”。(verilog implementation of the " six hexadecimal Johnson counters." )
    2009-09-18 19:11:18下载
    积分:1
  • uart_test
    verilog实现UART收发功能,硬件平台为spartan 6,软件平台为ise14.7(verilog implement UART rx and tx function)
    2017-10-07 16:34:13下载
    积分:1
  • DTMB
    能够完美产生数字地面电视(DTMB)的信源的程序。帧头模式为模式一。信道可选择,信号加入频偏,延时,后经滤波器后输出。(Able to produce perfect digital terrestrial television (DTMB) of the source program. Mode is the mode a header. Channels to choose from, the signal adding offset, delay, after the filter output.)
    2013-07-25 11:22:28下载
    积分:1
  • ml505_mig_design
    Xilinx开发板ML505的DDRII示例程序,使用Verilog,调用MIG,编译环境ISE11.1(Xilinx ML505 development board of DDRII sample program, using Verilog, called MIG, build environment ISE11.1)
    2010-05-13 02:39:04下载
    积分:1
  • 《HELLO FPGA》-软件工具篇
    说明:  学习使用quartus modelsim(learn to uee quartus modelsim)
    2020-03-18 09:24:22下载
    积分:1
  • LEDtest
    vhdl 实现fpga 闪灯控制 流水线闪灯 还用signalTAP进行检测,给初学者参考(vhdl fpga flash control lines to achieve flash is also used signalTAP testing, to advanced users)
    2010-06-10 16:27:57下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载