DE2_70_D5M_LTM

说明：  DAC3283 寄存器初始化，SPI驱动(Dac3283 register initialization, SPI drive)

64点的 FFT verilog,它是串行计算的，工作频率不到100M，计算速率很高，里面的层次很清晰。(64-point FFT verilog serial computing, the operating frequency of less than 100M, the calculated rate is high, the level inside is very clear.)

yuv444 与yuv422相互转换verilog语言(yuv444 to yuv422)

EDA/VHDL数字频率计，可编程逻辑门阵列，EDA课程设计(EDA/VHDL digital frequency meter, programmable logic gate array, EDA curriculum design)

ISE时序约束笔记——Global Timing Constraints，这个文档中详细介绍了如何使用ISE中约束工具和原理，对fpga水平提高有很大帮助(In this file , global timing constraints is introduced very clearly. It can really helps)

单片机通过总线，将占空比和频率送到CPLD/FPGA中，并控制PWM输出.采用Verilog HDL语言编写。(Microcontroller by bus, the duty cycle and frequency sent to the CPLD/FPGA in, and control the PWM output. Using Verilog HDL language.)

基于QuartusII环境下的地铁自动售票系统(Subway auto ticketing system based on QuartusII)

Verilog HDL 读取EEPROM项目的详细构建(Verilog HDL EEPROM read the detailed construction)

基于Verilog HDL 的单周期CPU设计。基于Verilog HDL 的单周期CPU设计。基于Verilog HDL 的单周期CPU设计。基于Verilog HDL 的单周期CPU设计。cpp码

LVDS并行数据传输，来自XILINX官网(LVDS Parallel Data Transfer)