Verilog写的88E1111 GMII接口驱动代码

FFT 8 PT RDX 2 USING VERILOG

说明：  QUARTUS2 16.9 VHDL FPGA ENDAT2.2

文利用直接数字频率合成器(DDS)与CPLD技术和单片机控制技术，研制和 设计了高分辨率、高稳定度的函数信号发生(Wen using direct digital frequency synthesizer (DDS) and CPLD technology and single-chip microcomputer control technology, development and Design of high resolution, high stability function of the signal )

说明：  实现AHB转SRAM接口实现，支持猝发，零等待延迟(Implementation of AHB to SRAM Interface)

verilog标准语法，还有很多的样例参考，学习的好资料。(Verilog standard grammar, there are many examples for reference, good learning materials.)

自己写的CRC的Verilog代码，在网上收集的crc相关的代码以及crc的matlab仿真代码(The CRC Verilog code written by myself, CRC related codes collected on the Internet and CRC matlab simulation code)

基于verilog convolutional coding 的卷积编码(verilog convolutional coding )

说明：  10G网络 CRC-32 CRC-64计算代码(10G Network CRC-32 CRC-64 Computing Code)

采用FPGA 来实现一个基于OFDM 技术 的通信系统中的基带数据处理部分，即调制解调器。其中发射部分的调制 器包括：信道编码（Reed-Solomon 编码），交织，星座映射，FFT 和插 入循环前缀等模块。(FPGA to implement a baseband data based on OFDM technology in the communication system processing section, namely modem. Transmitter modulator includes: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and insert the cyclic prefix modules.)

verilog HDL经典的入门书籍，内容很详细，讲了许多实例，适合硬件描述语言初学者。(verilog HDL classic introductory book, the content is very detailed, spoke many instances, suitable hardware description language for beginners.)