基于FPGA的ELM仿真

利用两个加法器和两个乘法器一起并行处理来实现

FPGA设计的I2C总线控制器的MASTER端的程序-FPGA Design of I2C Bus Controller MASTER-side procedures

4x4键盘模块。这个文件包括普通的键盘设计方案说明和相关的原程序。-4x4 keyboard module. The documents include ordinary keyboard design program descriptions and procedures related to the original.

DDS的VHDL程序，相当好，值得下载，共享才是王道(DDS, VHDL program is quite good, worth downloading, sharing is king)

a code to display in VGA using VHDL lang

设计一简易数字频率计，其基本要求是： 1)测量频率范围0～999999Hz； 2)最大读数999999HZ,闸门信号的采样时间为1s；. 3)被测信号可以是正弦波、三角波和方波； 4)显示方式为6位十进制数显示； 5）具有超过量程报警功能。 5)输入信号最大幅值可扩展。 6）测量误差小于+-0.1%。 7)完成全部设计后，可使用EWB进行仿真，检测试验设计电路的正确性。(The basic requirements of designing a simple digital frequency meter are: 1) The measuring frequency range is 0-999999 Hz. 2) The maximum reading is 999999HZ, and the sampling time of gate signal is 1 s. 3) The measured signal can be sine wave, triangle wave and square wave. 4) The display mode is 6-bit decimal number display. 5) It has alarm function beyond range. 5) The maximum amplitude of input signal can be expanded. 6) The measurement error is less than +0.1%. 7) After completing all the design, EWB can be used to simulate and test the correctness of the circuit.)

FPGA简:讲述了FPGA的基本概念、结构、发展-Jane FPGA: FPGA describes the basic concepts, structure, development

周立功sopc教程的视频资料，适合广大自学者学习-ZLG sopc video tutorial is suitable for the general self-learners to learn

This the adder VHDL code, it contains input and output fild, also simulate file-adder

HDLC协议的FPGA实现，运用了VHDL语言，主要就是解封帧HDCL，平切添加了外部接口