VHDL项目设置：FLV

A complete VHDL source code to 5-storey elevator

8位加法器源代码，vivado实现编写。(8 adder Source, vivado achieve write.)

实现按键控制AD三通道的电源转换的功能。(AD three buttons control channel to achieve power conversion)

用verilog hdl写的Norflash控制器，可实现单字节读写，扇区擦除。(Norflash controller edit by Verilog hdl,it can read or write by Byte,or erase the sector.)

一个简单的总线bus代码，初学者可以借鉴学习-A simple bus-bus code, beginners can learn to learn

sdi音频嵌入及解嵌代码,代码使用Verilog HDL语言(SDI audio embedding and decoding code, the code using Verilog HDL language)

滤波器 Generaic FIR Filter(Generaic FIR Filter)

VHDL语言100例详解，北京理工大学ASIC研究生出版，这里是1-20个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC published examples here is 1-20 months

vc707 board ucf xdc files

VHDL的基本数学运算库,非常好用-VHDL basic arithmetic library, a very handy! !