clock for spartan 3 evaluatoin board

基于VHDL的I2C程序0005,很不错的论文及程序，，大家快下啊-based on the I2C procedures VHDL 0005, a very good paper and procedures, we quickly under ah

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说明：  在FPGA上实现CAN总线SPI接口通信，使用Verilog语言(Realize SPI interface communication of CAN bus on FPGA, using Verilog language)

任意数据发生器的源代码-arbitrary data source code generator

Cadence_manual_1.2.pdf

本章介绍了两个EDA技术的综合应用设计实例:数字闹钟和直接数字频率合成器DDS。-EDA chapter describes the two technologies integrated application design example: digital alarm clock and direct digital synthesizer DDS.

16 bit switch input view in hexa format on 7seg display

一个sram的源码程序，它是256kbx16bit的sram-An SRAM of the source program, it is the SRAM 256kbx16bit

是用于pci开发的核，可以将硬件的信息映射到然间上来 节省出开发人员用于了解硬件的时间 (Pci developed for nuclear, hardware information can be mapped to the inter-ran up to save the developers time to understand the hardware)

说明：  fpga串口的接收程序基于verilog语言拿走不用谢。(The receiving program of FPGA serial port is based on Verilog language.)