异步FIFO的设计仿真和综合技术

Multipleksor 3 to 1 - 3x1bit in, 1x1bit out

基于FPGA的1553B总线编码解码器的设计-1553B Bus FPGA-based codec design

stm32与fpga之间的通信，协议是SPI的，可双向通信（双向通信需要自己例化，只例化了fpga到stm32）(Communication between STM32 and FPGA, the protocol is SPI, two-way communication (two-way communication needs to be taken as an example, only FPGA to STM32))

合并单元内GPS同步时钟的检测 合并单元内GPS同步时钟的检测-Combined unit GPS clock synchronization detection unit merger GPS synchronized clock detection

可以产生ASK FSK PSK 等调制信号。非常好用已经实现了所有功能。在硬件测试通过了(Can generate ASK FSK PSK modulated signals and so on. Is very easy to use all the features has been achieved. On the hardware test of the)

基于FPGA用verilog语言实现16点FFT(16-point FFT FPGA-based verilog language)

实现basys3板子的串口通信，内容非常纤细，还带有数码管显示(Realization of serial communication of basys3 board)

数字滤波器的C语言实现，，包含高通、低通、带通滤波器 (The C language implementation of the digital filter, including the high-pass, low pass, band-pass filter)

AV视频信号输入后，存入SDRAM中然后在PC上面进行显示的代码。-AV video signal input into the SDRAM in the PC and then display the code above.

vhdl的3-8译码器-instantiate the 3-8 decoder