同步清零复位的D触发器

ofdm的发射链路和接收链路的Verilog源代码，包括长短训练序列的生成，导频插入，加cp，ifft。(Source code of transmission link and reception link of OFDM)

文档主要是关于TFT-LCD的相关资料，是有关TFT-lcd芯片的结构与设计理念，对于在这方面学习的朋友有比较大帮助(402 output thinfilm transistorliqu idcrystal display(TFT-LCDdriver integrated circui(ICwith power controlbasedon the number of color stobe displaye disdescribed. Toachievethistypeofpowercontrol,referencevoltagebuffersare turnedonandoffaccordingtotheselectednumberofcolors.)

目前最新的OVL库，里面是标准的ASSERTION模块，支持VHDL刚Verilog，最近在做AXI协议验证的时候用到，分享下(The latest OVL(open verification library),including all standard module of assertions(VHDL and Verilog). It can be used into AXI Protocl Verification. Just share with you guys.)

de2,altera fpga

Xilinx FPGA 时序约束资料，原厂出品，经典不需要理由(Xilinx FPGA timing constraint information, original, classic no reason)

ahbsram contains all codes of sram

远立科技FPGA培训文档,关于GFP项目的一些细节，很好的！(Yuan established FPGA technology training documentation)

说明：  adc采集多路采集多通道基于dma的adc采集(ADC acquisition, multi-channel acquisition and multi-channel acquisition)

statemachine project for my school

Ovo sto saljem je tutorijal 7 sa vhdlom