sp605 multiboot rdf 0028 13.2 c

一款verilog设计的SRAM控制器，可以实现AHB总线控制的功能。(abcdefghijklmnopqrstuvwxyz)

rc6 algorithm designed based on verilog and is verified

nios大神进阶，一本非常好的FPGA书籍，从RTL到eclips(nios tech.a very good book learning FPGA tech.)

VHDL 波形防止抖动程序,学习试验材料(VHDL prevent jitter waveform procedures, the pilot study materials)

说明：  ad9649的fpga驱动程序,FMC接口，基于Xilinx KC705(AD9649 Evaluation Board, FMC Interposer & Xilinx KC705 Reference Design)

这个代码主要实现了基于VHDL的关于TV方面的功能。(This code is the main achievement of the VHDL about aspects of the function based on TV.)

rebuild file in check for

假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 +　寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)

fpga 控制ad7606，编写代码用verilog语言，实现采集函数发生器

计算机中每一条机器指令的执行，都离不开程序计数器的正确执行，本程序实现程序计数器。(Computer implementation of each machine instruction, are inseparable from the correct implementation of the program counter, this program achieve the program counter.)