verilog代码 cordic 核心

此文件描述的 verilog booth 型乘法器的代码。源代码是模拟和验证效果会更好

含异步清零和同步清零的计数器的设计，内容是源代码，以及相关文件，打开即可(Clear cleared asynchronous and synchronous with the counter design, content source code and related documents, can be opened)

说明：  数字逻辑实验课第十二次作业，基于Verilog的Clock时钟(Clock based on Verilog)

SDR SDRAM 控制器的源代码 altera公司的(source code from altera)

mimo检测算法的FPGA实现，包括最小迫零检测算法和ML检测算法，已在ISE上仿真通过 (mimo detection algorithm for FPGA implementation, including the smallest zero forcing detection algorithm and ML detection algorithm has been simulated by ISE on)

基于FPGA的Mcbsp通信源码，经过项目实测检验(Mcbsp communication source code based on FPGA,Through the test of the project.)

Avt_S6LX9_MicroBoard_UCF_110127，有关xilinx spartan6开发板的相关参考设计。(Adding Custom IP to an Embedded System, the relevant reference on xilinx design.)

本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式；并对这两种实现方式的优点和缺点进行分析，比较后确定本系统的方案：基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)

This is the Spartan 3E tutorial_02.

This source is used to control 7 segments on FPGA boad