简易制作呼吸灯小程序

VGA显示控制：时序控制+像素点的颜色处理显示十字光标（vorilog）(VGA Display Control: Timing Control+ pixel color processing and display cross cursor (vorilog))

spartan-3e vhdl fpga 输入用滑动按钮代替 输出用led代替(spartan-3e VHDL fpga input with sliding button instead of the output with led instead)

实现了MASH111功能，输入位数可编程(MASH 1-1-1, delta-sigma , input bits are programmable)

针对FPGA一个实现vga显示的很好的例程，vhdl语言编写。-FPGA realize for a good vga display routines, vhdl language.

直接序列扩频系统的收发系统，可以进行参数配置(this is a Verilog program )

Verilog版的C51核(OC8051)-Verilog version of the C51 core (OC8051)

利 用 来 vhdl 设 计 p cm的 实 现-Vhdl design used for the realization of p cm

In this design, it is assumed that a buffer sized as 1024x8 bits provides main data including scale factors and Huffman code bits to Huffman decoder. Also, it is assumed that a memory with 1024x8 bits is ready for each component to write or read the output or input 576 frequency lines.(This folder contains three directories: Huffman, IMDCT and Filterbank, each of them includes all the VHDL source codes of the component.)

Verilog投币式手机充电仪 清华大学数字电子技术基础课程EDA大作业。刚上电数码管全灭，按开始键后，数码管显示全为0。输入一定数额，数码管显示该数额的两倍对应的时间，按确认后开始倒计时。输入数额最多为20。若10秒没有按键，数码管全灭。(Verilog coin operated cell phone charger EDA major homework of digital electronic technology foundation course, Tsinghua University. Just put on the digital tube completely extinguished, press the start button, the digital tube display is 0. Enter a certain amount, the digital tube shows the amount of double the corresponding time, according to the confirmation began countdown. The maximum amount of input is 20. If there is no button in 10 seconds, the digital tube will die out.)

自适应滤波，对输入信号进行选择性的加权处理，使输出达到最优化，并且能够跟踪和适应系统和环境的动态变化(Least mean square，of the input signal processing, selective weighted output, and optimize can track and adapt to the dynamic changes of the system and environment)