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zong

于 2020-01-11 发布
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说明:  quartusII 9.1,位同步提取电路,可以实现位同步时钟提取,其中包括分频器,和由D触发器以及与门组成的鉴相器模块。(Quartus II 9.1, bit synchronous extraction circuit, can realize bit synchronous clock extraction, including frequency divider, phase discriminator module composed of D trigger and and gate.)

文件列表:

Block1.bdf, 29918 , 2019-12-29
dff.vhd, 259 , 2019-12-28
fenpin.vhd, 540 , 2019-12-28
weifen.vhd, 642 , 2019-12-28
zong.bdf, 20763 , 2019-12-29

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