FPGA芯片亚稳态参数测试代码

应用背景6T SRAM是基于晶体管模块设计。关键技术这个6T SRAM技术是旧版本，新版本已经更新。

几大代工厂的flash verilog源代码(flash verilog code)

, verilog语言实现的高速DACAD9747的SPI接口及寄存器配置

altera公司飓风四代芯片，LCD屏幕彩条显示，有效实现行、场扫描。练习FPGA驱动VGA或LCD显示的入门程序(Altera hurricane four generation chip, LCD screen color display, the effective realization of line and field scanning.Practice FPGA to drive VGA or LCD display)

扰码器的FPGA实现，选择的扰码器规格为15位移位寄存器。(FPGA scrambler, scrambler specifications for a 15 bit shift register.)

hdmi 视频编解码输入输出模块，verilog实现(hdmi encoder and decoder in verilog.)

说明：  1、 例程功能VEYE-290-LVDS模组视频接入演示。（显示设备必须支持1080p/30或1080p/25的帧率） Veye模组—>MIA701开发板—>HDMI显示设备 2、 本例程硬件平台 MIA701-PCIE开发板，FPGA芯片：XC7A100TFGG484 3、 软件平台Vivado2018.1。 4、 附件含开发板原理图（底板+核心板）(1. Video access demonstration of routine function VEYE-290-LVDS module. (Display devices must support 1080p/30 or 1080p/25 frame rates) Veye Module - > MIA701 Development Board - > HDMI Display Equipment 2. The hardware platform of this routine MIA701-PCIE development board, FPGA chip: XC7A100TFG484 3. Software platform Vivado 2018.1. 4. Appendix contains schematic diagram of development board (bottom + core board))

说明：  对片内RAM进行读写操作，通过数据的写入和读出，对RAM的操作进行熟悉。(Read and write ram on chip, and get familiar with RAM operation through data writing and reading.)

eda的入门学习课件，老师不错，内容页挺好的(eda learning files)

基于LabVIEW FPGA的频谱估计与分析(the power spectrum estimation and analysis based on LabVIEW FPGA)