-
FIFO
This is a simple example of FIFO(first in and first out) module written in verilog code(This is a simple example of FIFO (first in and first out) module written in verilog code)
- 2013-10-04 00:41:42下载
- 积分：1
-
project_1
简单的一个Verilog小程序，适合刚接触的人群(A simple Verilog small program, suitable for people just contact)
- 2020-06-16 22:20:01下载
- 积分：1
-
Verilog 经典实例，完整源码与大家分享
Verilog 经典实例，完整源码与大家分享-Verilog classic example of a complete source to share with you
- 2022-07-03 12:56:56下载
- 积分：1
-
Vpwm
按键可调占空比的PWM波产生程序。语言：VHDL(Button adjustable duty cycle of the PWM wave generator. Language: VHDL)
- 2013-07-30 12:30:58下载
- 积分：1
-
syn_rd_wr_fifo
该代码实现了FPGA对USB芯片68013的读写，语言是VERLOD，试验通过。(The code to achieve the FPGA read and write 68013 on the USB chip, the language is VERLOD, through the test.
)
- 2015-05-02 14:34:16下载
- 积分：1
-
FPGA PWM输入与输出
自己写的pwm占空比采集与输出 但是没有计算占空比，如果又需要可以自己修改计算并显示占空比，该程序已经测试过了，可以使用，拿出来供大家分享，新手写的如有不足请大牛带飞。
- 2022-01-28 02:10:47下载
- 积分：1
-
IIC
fpga实现的IIC通信的例程，注释很详细(fpga implementation of serial communication routines, comments in great detail)
- 2021-03-24 16:29:15下载
- 积分：1
-
20190717
uart documentation, july 17, 2019. the document describes the basics of verilog programming and how to implement them on an fpga device
- 2020-06-21 21:40:01下载
- 积分：1
-
PID
用Verilog HDL编写的PID程序代码，成功调试，运行良好。(The source code of PID in Verilog HDL.Simulation was successful.)
- 2012-03-09 11:18:17下载
- 积分：1
-
移位寄存器。verilog VHDL
shift register. vhdl verilog
- 2023-06-29 10:50:03下载
- 积分：1
