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bhaswatiml
matlab code for communication
- 2013-11-07 00:43:24下载
- 积分：1
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实战训练21 SDRAM硬件控制
说明： SDRAM硬件控制,fpga的verilog语言，适合学习(SDRAM hardware control, Verilog language of FPGA, suitable for learning)
- 2020-04-29 11:45:16下载
- 积分：1
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Verilog HDL实现的I2C Slave模拟
Verilog HDL实现的I2C Slave模拟-achieve the Verilog HDL simulation I2C Slave
- 2022-11-26 13:05:03下载
- 积分：1
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beep
用VHDL语言实现的蜂鸣器发声程序，当按下不同按键时，发出不同频率的声音(Function:when different buttens are pressed, beep will play sound with different frequency.
laguage:VHDL)
- 2021-04-25 22:58:46下载
- 积分：1
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This procedure for the serial communication procedures, the use of Verilog langu...
此程序为串行通信程序,采用verilog语言编写的,经过仿真验证已经通过.-This procedure for the serial communication procedures, the use of Verilog language, after simulation has been adopted.
- 2022-04-22 21:51:37下载
- 积分：1
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spi_master_sent
在FPGA平台实现SPI传输协议开发，SPI为三总线式。(Implementation of SPI transmission protocol development on FPGA platform)
- 2020-08-02 08:18:35下载
- 积分：1
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disparity
Disparity mapp code in VHDL
- 2017-11-30 14:48:59下载
- 积分：1
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altera de2 开发板 vga lcd控制quatus 工程
altera de2 开发板 vga lcd控制quatus 工程-altera de2 board vga lcd control quatus works
- 2023-05-15 10:55:03下载
- 积分：1
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bt656_decode
说明： 将嵌入式BT656格式数据解码出带行场同步信号的YCbCr422格式数据(Decoding Embedded BT656 Format Data to YCbCr422 Format Data with Field Synchronization Signa)
- 2021-01-28 10:38:35下载
- 积分：1
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homework32
说明： 这是32位移位寄存器，是用verilog编写的，能够实现从1到31位的左或右的移位(This is a 32-bit shift register, is prepared verilog, can be realized from the 1-31 shift left or right)
- 2009-07-27 15:54:00下载
- 积分：1
