-
429recive
实现FPGA接收429板卡发送的信号,并根据数据最后两位点亮相应的LED。(FPGA to achieve the 429 board to receive the signal sent, and according to the data of the last two of the corresponding LED.)
- 2015-11-26 11:18:19下载
- 积分:1
-
ISARCSSim_dr
基于CS的一维距离像(HRRP)及FFT成像对比(CS-based HRRP and FFT HRRP)
- 2021-01-13 19:58:49下载
- 积分:1
-
实用的程序代码,希望对大家有用,已经调试通过
实用的程序代码,希望对大家有用,已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through
- 2022-09-21 12:35:03下载
- 积分:1
-
HDB3 ENCODING AND DECODING METHOD
HDB3 ENCODING AND DECODING METHOD
- 2022-12-23 08:30:03下载
- 积分:1
-
高速双端口RAM的vhdl实现。包含仿真波形
高速双端口RAM的vhdl实现。包含仿真波形-High-speed dual-port RAM realize the VHDL. Contains the simulation waveform
- 2023-08-22 14:25:04下载
- 积分:1
-
BCH编码器和解码器的源代码,FLASH控制器,通信是必要的哦
bch encoder+decoder 源代码,Flash控制器,通讯都需要用到哦-bch encoder+ decoder source code, Flash controller, communications are needed Oh
- 2022-05-19 23:35:28下载
- 积分:1
-
aiqingmaimai
数字钟蜂鸣器音乐——爱情买卖,很时尚的闹钟音乐代码,经测试,很有感觉。(Digital clock buzzer music- love trading, very stylish alarm clock music code, tested, great feeling.)
- 2020-12-28 01:19:01下载
- 积分:1
-
ieee
VLSI Implementation IEEE Papers 2010 to 2014
- 2014-07-08 03:52:41下载
- 积分:1
-
FPGA VERILOG 用DCFIFO实现 跨时钟域的数据传输,已验证,直接可用...
FPGA VERILOG 用DCFIFO实现 跨时钟域的数据传输,已验证,直接可用-FPGA VERILOG using DCFIFO realize cross-clock domain data transfer, has been verified, directly available
- 2022-04-17 14:15:55下载
- 积分:1
-
页面置换算法中的三种算法相关程序代码
FIFO LUR OPT
页面置换算法中的三种算法相关程序代码
FIFO LUR OPT-yemianzhihuansuanfa
- 2022-10-19 08:10:03下载
- 积分:1