三种方法编写多路选择器的VHDL源代码 分别使用if else ,select ,when 语句...

这份代码完成的功能是通过蜂鸣器播放《梁祝》这首曲子，当然可以自行更改代码，以播放其它的乐曲，所用的硬件描述语言是VHDL，代码有四部分构成，顶层模块、预分频模块（产生基频）、音乐表格和分频模块（产生所需的各音调）。

用双端口ram实现异步fifo，采用格雷码，避免产生毛刺。-Using dual-port ram realize asynchronous fifo, the use of Gray code, avoiding the production of burr.

it has 6 packages of 8051 sources,including source code(VHDL and Verilog),dc scripts, pdfs, netlists etc. and a MIPS IP package

VHDL 2FSK调制解调器各部分的原理与代码(The principle and code of each part of the VHDL 2FSK modem)

Verilog reference book

FPGA实现BPSK调制，带Modelsim仿真，实际系统测试通过，载波信号，调制波信号频率可调(FPGA implementation BPSK modulation with Modelsim simulation, the actual system test, the carrier signal, modulated wave signal frequency adjustable)

the transmitter and receiver modules for serial communication

此示例是8051核加频率计的联合设计,带有8051IP核资料-This example is the 8051 nuclear increase the frequency of joint design, with the nuclear information 8051IP

初学cpu结构的很好的verilog代码的示例，适合初学者(novice cpu structure of the good verilog code examples for beginners)

说明：  用FPGA实现8点fft，整个代码使用verilog编写，主要运用了加法器和乘法器，简单易懂(8-point FFT with FPGA, The whole code is written by Verilog, mainly using adder and multiplier, which is easy to understand)