通过vhdl实现ls138硬件功能 通过vhdl实现ls138硬件功能

说明：  amba总线桥:ahb to asb!verilog hdl文档加代码，非常全，soc(amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc)

FM收音机的解码及控制器VHDL语言实现，Xilinx提供的．别谢我．-FM radio decoder and controller VHDL, Xilinx provide. I thank other.

是用于pci开发的核，可以将硬件的信息映射到然间上来 节省出开发人员用于了解硬件的时间 (Pci developed for nuclear, hardware information can be mapped to the inter-ran up to save the developers time to understand the hardware)

xilinx 开发板程序，LED灯控制程序-Xilinx development board procedures, LED lamp control procedures

Basic VHDL code to create a sine wave generator for an FPGA board.

说明：  基于OV7670采集，SDRAM缓存，sobel处理，VGA显示的工程，内有全部代码，基于QUARTUS开发板实现。 FPGA 边缘检测(Based on OV7670 acquisition, SDRAM cache, sobel processing, VGA display project, with all the code, based on QUARTUS development board. FPGA edge detection)

。给出了时域滤波的基本原理以及通常采用的 IIR 椭圆地物杂波滤波器的设计方法。重点研究了回归滤波器这一时域滤波算 法。从正交多项式的拟合出发，给出了回归滤波器抑制地物杂波的基本原理及 其滤波实现过程。通过对回归滤波器的计算复杂度的研究，寻找使回归滤波器 计算量最小的正交多项式。分析了回归滤波器频率响应特性，比较了回归滤波 器与IIR 椭圆地物杂波滤波器的计算复杂度。利用仿真的雷达信号，分析了回 归滤波器的地物杂波抑制性能。回归滤波器实际上是一高通滤波器，它在滤掉 低频地物杂波的同时，对落在滤波器阻带内的天气回波信号同样会造成衰减。 在天气回波信号谱宽固定的情况下，通过改变天气回波信号的平均多普勒频率， 分析了回归滤波器对它的衰减情况。在基于一组实际采集的雷达信号的基础上， 给出了回归滤波器的地物杂波抑制比随着滤波器阶数的变化情况。(Firstly, this dissertation introduces the research background and significance of ground clutter suppression, analyzes the characteristics of the ground clutter and weather signals in the Doppler weather radars and simulates Doppler radar echo signals (It includes ground clutter, weather echo signals and the mixture of them). The simulated signals are used later to study the time and frequency domain ground clutter suppression. Secondly, this dissertation talks about the time domain filtering, gives the basic theory of time domain filtering and describes the design method of the usually used fifth-order elliptic infinite impulse response (IIR) ground clutter filter. In the time domain, the work focuses on the regression filter. From the orthogonal polynomials fit, this dissertation gives the basic theory of the regression filter for ground clutter suppression and the filtering process using a regression filter. Through the study of the computational complexity of regression)

基于FPGA控制的DDS波形发生器，可在Cyclone IV系列板子上使用，已经过仿真验证(Based FPGA control DDS waveform generator in Cyclone IV series board on use, has been simulation)

VHDL数字系统设计工程实践，包含实验的原理，真值表和结构图描述，以及相关的VHDL代码。-VHDL digital system design engineering practice, including the principle of the experiment, truth table and chart descriptions, and associated VHDL code.

verilog语言设计的VGA驱动。在Quarus11.0下编译成功，并在Altera cyclone4开发板上测试OK(verilog language design VGA driver. In Quartus11.0 successfully compiled and Altera cyclone4 development board test OK)