用FPGA实现数字锁相环，开发环境为ISE

n_bit_paralleLoadShiftRegJK

sdi音频嵌入及解嵌代码,代码使用Verilog HDL语言(SDI audio embedding and decoding code, the code using Verilog HDL language)

实现LDVS接口数据接收 含有协议结构以及处理(lvds Verilog 512 frame)

不同方法实现的CPU系统。同样支持加减乘，逻辑/算术移位，与或非等建议指令。(Different methods to achieve CPU system. Also supports, subtraction, multiplication, logic/arithmetic shift, and the like or recommend instruction.)

基于BASYS开发板的波形发生器和示波器设计，可以在显示器上显示波形，共有三角波方波锯齿波正弦波四种

数字密码引爆器的输入描述：1、 在开始输入密码以前的等待状态，首先要按READY键，表示目前准备就绪，可以输入数字密码；2、 当引爆事件发生后，应该回到等待状态，设置WAIT_T键；3、 如果输入密码不正确，此时要操作READY和WAIT_T是不起作用的，必须由设计人员重新设置到等待状态，设置SETUP键，SETUP为内部按键，操作人员应该不能接触；4、 确定密码输入后，要设计一个点火按键FIRE；-digit passwords detonated"s input Description : one at the start and enter the password before the wait state, according to First READY button, now ready to be imported into digital code; Two, when detonated after the incident, should wait for the state to set up WAIT_T bond; three, if a password is not correct, this time to operate READY WAIT_T and is non-functional, the design must be re-installed to wait for the state, set up SETUP button SETUP internal keys, the operator should not contact; 4 to determine the password, to design a FIRE- ignition keys;

用FPGA分频，做一个有时分秒的时钟，并用数码管显示(FPGA divide a sometimes every minute clock, and digital display)

I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices.

常用的VHDL语言编写的LED灯控制程序,这是教学用的，开发板采用的是EPM240T100C5N，买开发板时附带的程序

verilog实现基于i2s协议接口，在fpga上验证通过。(Verilog implements the interface based on I2S protocol and verifies it on fpga.)