Verilog_HDL源码， Verilog_HDL源码

VHDL operators basics

快速付里叶变换子程序所需 RAM 空间以输入的首地址为基址,向增加的方向扩展(Fast Fourier Transform subroutine RAM space required to input the first address of the site was to increase the direction of expansion)

this is the source code we have been working on for our project using altera de2 board. the code can be run but some of it miss the end game module, while some doesn t have the complete vga code

利用matlab，对偏振控制器进行仿真，最终在邦加球上进行显示(Using matlab, simulation of the polarization controller eventually be displayed on the Poincare Sphere)

dct实现verilog hdl的数字图像处理，源代码(dct achieve verilog hdl digital image processing, source code)

hex_counter old project, please let me know if need any help

基于FPGA的VERILOG语言的DS18B20温度检测程序，代码自测可用(FPGA based VERILOG language DS18B20 temperature detection program, code self test available)

本文件是可以直接使用下载到FPGA里面使用，里面包含时钟分频电路，串并转换和并串转换电路，多通道信号加权的乘加电路等。-The document may download to FPGA chip to complete the clock divider,serial-to-parallel,parallel-to-serial,and multiple-add circuit for multiple channels weight calculation

一个完整的信号测试程序,对信号的各项指标进行完整的测试,并分析-A complete signal test procedures, the various indicators of signal integrity testing, and analysis of

Demo 使用 PmodHMT 模块实时检测环境温度和湿度。(The Demo uses PmodHMT modules to detect environmental temperature and humidity in real time.)