可重构 fir 滤波器 vhdl 代码

说明：  I2C 从设备通讯应用示范程序，用于I2C设计验证(I2C slave communication application demo program, used to for I2C design verification )

vhdl寄存/计数器设计-VHDL Storage/counter design

数字钟VHDL软件设计，包含多种功能，报时，12,24切换，调时(The design of VHDL digital clock software, including a variety of functions, timer, 12,24 switch, adjustable)

说明：  本资源有一个matlab程序段，是仿真BPSK分别在高斯噪声和瑞利衰落下的误码率，产生图形对仿真值和理论值进行比较(This resource has a matlab program segment, which is the bit error rate of simulated BPSK under Gaussian noise and Rayleigh fading respectively. The generated graph compares the simulated value with the theoretical value.)

LCD Interface_Xilinx.CPLD源码参考设计(LCD Interface Xilinx CPLD)

Verilog编写的串口通讯下解码状态机(Verilog serial communication prepared under the decoder state machine)

16级流水线型cordic旋转代码以及测试文件，亲测好用(16-stage pipelined cordic rotation code and test files, pro-testing)

24,60,100进制的计数器，还有数字时钟，欢迎下载哦~-24,60,100 229 of the counter, digital clock also welcome to download oh ~

uart串口的vhdl语言程序。本人调试过 ，非常好用-serial UART VHDL Language Program. I debug, and very easy to use

这是一个nios工程，控制TFT液晶屏的程序。FPGA平台用Verilog HDL语言编写的，MCU软核程序有C语言编写。通过这一个完成的工程，你就会明白SOPC的一些实现方法。(This is a nios engineering, control TFT LCD screen program. The FPGA platform Verilog HDL language preparation with the nuclear program has a soft, MCU written in C language. Through this a complete project, you will understand some of the SOPC methods of realization. )