binary LDPC DECODER

uvm验证方法学入门。step by step，适合IC验证人员入门(uvm verification methodology started. step by step, for IC verification personnel entry)

Synchronous Resets? Asynchronous Resets?I am so confused!How will I ever know which to use? 复位信号的论文-Synchronous Resets Asynchronous Resets I am so confused! How will I ever know which to use Minute Signal-paper

This is code of UVM CALLBACK function.

This free cpu-ip! use verilog

说明：  多通道连续声发射数据采集，每个通道最大5M，采用verilog编程，内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)

自动售货机VHDL程序与仿真的vhdl的源代码-Vending machine VHDL procedures and simulation of vhdl source code

The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.

Basic VHDL code to create a sine wave generator for an FPGA board.

基于Basys2开发板实现VGA输出，PS/2键盘接入的贪吃蛇游戏，键盘上下左右控制方向，小键盘+键控制速度，小键盘回车开始游戏，空格暂停游戏。(Basys2 based development board to achieve VGA output, PS/2 keyboard access Snake game, up and down the keyboard to control the direction, speed control keypad+ key keypad Enter to start the game, pause the game space.)

实现扰码的功能，主要为64位在pcs子层传输的扰码器设计(To achieve the functions of scrambling code)