交通信号灯 Verilog 硬件实现

用vhdl语言生成锯齿波，数据可自行改变(Sawtooth wave with vhdl language generation, the data can change by itself)

基于FPGA 16QAM解调verilog代码，(16QAMdemoluator veriliog)

axi协议中的full子协议，可用于直接访问zynq器件的ddr器件。(The full sub protocol in the Axi protocol can be used to direct access to the DDR device of the zynq device.)

verilog编写的1024点的fft快速傅立叶变换代码                                                                                                                                                     

资源描述数据传输发生在芯片内部，在芯片内部和系统之间也有。因为它是异步时钟，将没有方法来建立时钟分配技术。

说明：  图像去雾算法FPGA实现，使用xilinx Vivado开发环境(Image dehazing algorithm FPGA implementation using xilinx Vivado development environment)

SOPC技术的fpga的实现verilog硬件描述语言，编写的在niosII 程序   采用altera芯片

是codic算法实现atan的C程序，包括定点和浮点程序，已经通过验证。(Atan is codic algorithm of C procedures, including fixed-point and floating-point procedures, has been validated.)

超前进位加法器得VHDL实现小点资料代码(CLA was a small point of information VHDL code)

说明：  用VERILOG实现的，hdb3编码器和解码器，经过前仿真和后仿真成功(Achieved with the VERILOG, hdb3 encoder and decoder, after a successful pre-simulation and post simulation)