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用FPGA实现IIC通讯的主控端,最简化的代码,占用最小FPGA资源
用FPGA实现IIC通讯的主控端,最简化的代码,占用最小FPGA资源-Use FPGA to come ture the main control of the iic comunication, the most simple code and using the least FPGA resource
- 2022-07-10 12:46:57下载
- 积分:1
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game
反应速度测试小游戏,最小外设cpld游戏,带设计说明书(Reaction speed test games, the minimum peripheral cpld game, with design specifications)
- 2010-05-14 18:42:57下载
- 积分:1
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formal_verification
说明: 现在最流行的RTL设计方法之一,本书为全球流行的设计入门书籍(One of the most popular RTL design methods nowadays, this book is an introductory book for popular design all over the world.)
- 2020-06-23 22:00:02下载
- 积分:1
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pc104vhdl_change
PC104总线的CPLD代码,调试已经通过,可以修改应用到其他的工程(PC104 bus CPLD code, debugging has been passed, you can modify the application to other engineering
示例用法:)
- 2013-08-29 12:07:43下载
- 积分:1
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abcd
数字频率测量器,脉宽测量器。可测量多种频率波形的脉宽。(Digital frequency measurement device, pulse width measurement device. Measurement of the waveform of frequency pulse width)
- 2011-12-09 13:40:49下载
- 积分:1
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wm8731
wm8731的使用,用于音频信号的采集或者产生(wm8731 use for audio signal acquisition or produce)
- 2009-07-20 15:51:33下载
- 积分:1
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用于实现两个数相加的vhdl代码,在相应的编译器中使用
用于实现两个数相加的vhdl代码,在相应的编译器中使用-used to achieve the two summed VHDL code, the corresponding use of compiler
- 2022-10-30 11:05:03下载
- 积分:1
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suijitu
matlab随即图设计程序,应该比较有用,希望能申请会员成功吧。。(matlab then drawing design program)
- 2013-04-25 10:49:07下载
- 积分:1
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FMCOS
复旦cpu COS
- 2015-12-23 15:53:42下载
- 积分:1
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延迟线模块的verilog代码,延迟线模块是数字电路设计常用的模块...
延迟线模块的verilog代码,延迟线模块是数字电路设计常用的模块-Delay-line module Verilog code, delay-line module is commonly used in digital circuit design module
- 2022-08-09 02:38:35下载
- 积分:1