Can be directly downloaded to the chip used in the complete UART with FIFO proce...

简单电子玩具的感知模块程序设计,通过外部输入信号改变内部信号.从而改变玩具的状态-simple electronic toys perception module programming, through external input signal a change in the internal signal. In order to change the state of toys

单相的主动式电压质量控制器 对电压跌落进行了补偿(single-phase AVQR for power quility improvement)

本文以FPGA为硬件平台，基于EDA工具QUARTUSⅡ为软件平台上对HDB3编/译码进行实现。由于在EDA的软件平台QUARTUSⅡ上不能处理双极性的信号，因此对HDB3码的编/译码的实现分为：软件部分和硬件部分。软件部分是基于QUARTUSⅡ的平台上对输入的码元进行编码和译码，通过系统仿真，验证了HDB3码的编译码的正确性；硬件部分采用CD74HC4052双四选一的数模选择器实现单极性到双极性的转换；采用AD790和SE5539实现双极性到单极性的转换。最后，通过仿真，验证了方案的正确性。

vhdl,无进位同步计数器，完成6进制加，输出6进制序列数-vhdl, non-binary synchronous counter to complete the six binary Canada, output 6, the number of binary sequences

串uart的vhdl，verilog，lattic实现原码 里面有四个文件,分别UART 源码 (lattice version)uart 源码 (Verilog)uart 源码 (VHDL)uart16550.tar-uart series of vhdl and verilog. lattic achieve the original code, there are four documents, Source respectively UART (lattice version) uart source (Verilog) uart source (VHDL) uart16550.tar

通过vhdl实现ls138硬件功能 通过vhdl实现ls138硬件功能 -the description of ls138 in vhdl

making a simple clock using altera vhdl

用FPGA于32进行SPI单向通信，FPGA向32放松发送数据(One-way SPI communication is carried out in 32 with FPGA, and data is sent to 32 with ease by FPGA.)

VHDL版的C51核(MC8051)-VHDL version of the C51 core (MC8051)

说明：  基於空間向量調變的開關法，在於載波做比較切出方波再送至開關讓馬達啟動(Based on the switching method of space vector modulation, the square wave is cut out for carrier comparison and sent to the switch to start the moto)