基于FPGA的数字钟

Demo program for use UART STM8S

基于FPGA的16QAM，用verilog编写，其中DDS为自己编写，含设计文件和testbench。已通过moldesim软件仿真。 (FPGA-based 16QAM, with verilog writing, including DDS for their preparation, including design files and testbench. Simulation software has been through moldesim.)

这是QuarusII中文的用户指南！希望大家有用(This is a QuarusII Chinese User' s Guide! Hope that useful)

双向移位寄存器的VHDL源程序,自己做实验编写的可以用 谢谢大家-Bi-directional shift register of the VHDL source code, prepared by their own experiments can be used Thank you

to learn bout development of vhdl code

GE PCI5565 PMC5565 PCIE5565反射内存网数据中断接收程序 接收中断 反射内存网 VMIC5565反射内存卡 实时仿真技术 PCI5565PIORC-110000(GE PCI5565 PMC5565 PCIE5565 reflective memory network data interrupt transmission program VMIC5565 reflective memory card real-time simulation technology)

Interface for ADS8361 TI ADC IP Core for ALTERA NIOS2

fft 1024点verilog代码,适用于基-4的FFT算法描述，使用quartus，modelsim，(fftpoint 1024 verilog code)

实现dds功能，利用quartus软件， 子模块包括加法器，锁相环，date-rom 利用原图将各模块综合，利用ps2键盘控制频率及相位。-Dds realize functions, using Quartus software, sub-modules including the adder, phase-locked loop, date-rom image to the module using integrated, using ps2 keyboard to control the frequency and phase.

一百多个例子很好的verilog 学习资料，大家可以多多参考，适合初学者学习-More than 100 examples of good learning materials Verilog, you can a lot of reference, suitable for beginners to learn