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VGA
本科毕业设计,简易逻辑分析仪,重点在于用CPLD搭建显卡,输出VGA信号驱动显示器显示逻辑波形(A design for LA,use cpld to generate VGA signals.)
- 2014-04-28 11:22:01下载
- 积分:1
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fft in dspbuilder under VHDL source code and test incentives document matl ab mo...
fft在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-fft in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
- 2022-03-14 15:52:36下载
- 积分:1
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VHDL的重要PPT资料,对初学者非常有益处
VHDL的重要PPT资料,对初学者非常有益处-VHDL important PPT information is very useful for beginners
- 2023-05-02 18:55:09下载
- 积分:1
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Booth2_final
该文件是booth乘法器的verilog源代码,经过最终的仿真,可以直接运行(This file is booth multiplier verilog code, after the final simulation, can be directly run)
- 2015-05-08 09:29:56下载
- 积分:1
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gold
基于vhdl语言的15位gold序列的设计的开端一部分程序(Vhdl language based on sequences of the 15 gold as part of the beginning of the design process)
- 2011-05-16 21:48:38下载
- 积分:1
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OFDM_QPSK
给予QPSK调制的OFDM例程,简单明了的表述了OFDM的通信原理(Given OFDM QPSK modulation routine, simple expressions of OFDM communication theory)
- 2013-08-15 14:26:43下载
- 积分:1
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RISC-V-Reader-Chinese-v2p1
说明: RISC-V 芯片设计规范,很有参考价值,开源芯片设计必备参考资料,希望对大家有帮助。(The RISC-V Foundation is chartered to standardize and promote the open RISC-V instruction set architecture)
- 2020-07-01 23:00:02下载
- 积分:1
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altera_fft
verilog实际例子,非常适合初学者学习(verilog practical examples, very suitable for beginners to learn)
- 2020-12-06 16:49:22下载
- 积分:1
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SystemVerilog_For_Design_Springer_2nd_Ed_2006
SystemVerilog For Design (Springer-2nd_Ed-2006)
- 2009-10-08 02:57:28下载
- 积分:1
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cnt6
verilog实现的“六进制约翰逊计数器”。(verilog implementation of the " six hexadecimal Johnson counters." )
- 2009-09-18 19:11:18下载
- 积分:1