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class16_pll
说明: FPGA实现PLL锁相环,输出不同频率的时钟控制信号。(FPGA realizes PLL and outputs clock control signals of different frequencies.)
- 2021-03-19 17:19:19下载
- 积分:1
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modulation-and-demodulation
调制与解调系统的FPGA设计实现,包括2-ASK调制和解调,2-FSK调制和解调,2-PSK调制和解调,QPSK调制和解调,PPM调制和解调的verilog源代码。(FPGA design implementation of modulation and demodulation system, including 2-ASK modulation and demodulation, 2-FSK modulation and demodulation, 2-PSK modulation and demodulation, QPSK modulation and demodulation, PPM modulation and demodulation verilog source code .)
- 2021-04-09 09:29:01下载
- 积分:1
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FSK
说明: FSK VHDL FSK调制与解调VHDL程序及仿真(FSK VHDL )
- 2020-09-03 11:28:07下载
- 积分:1
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DisplayPort Link training optimization
说明: 介绍了Displayport规格中lind training的背景研究,设计和实现。(As the requirement for bandwidth continues to increase in the video market, retaining
the signal integrity becomes increasingly more difficult. For many of todays
commonly used video interfaces, there are devices that can be used to assist in this
matter. However, the use of such a device is only partially documented in the DisplayPort
specification for the receiving image device, which means that the receiving
side of the video link is free to choose its own implementation. This report presents,
together with background research and design decisions, a suggestion for such an
implementation. This implementation would need to be compatible towards a wide
range of possible video Source devices and DisplayPort cables.)
- 2021-01-11 16:48:49下载
- 积分:1
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vhdl子程序,本人收集的,比较常用的代码
vhdl子程序,本人收集的,比较常用的代码-VHDL subprogram, I collected to compare commonly used code
- 2022-04-14 14:19:05下载
- 积分:1
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test_vhdl
vhdl测试程序,用于初雪者熟悉hdl的具体语法应用。比较简单了。(VHDL test procedure for the First Snow hdl who are familiar with the application of specific syntax. A relatively simple.)
- 2009-01-09 18:25:34下载
- 积分:1
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Verilog 编写的网卡DM9000A的IP核,altera公司寄的DE2系统中的源程序核...
Verilog 编写的网卡DM9000A的IP核,altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear
- 2022-02-06 18:05:18下载
- 积分:1
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数字密码锁
数字密码锁的vhdl实现,包括设置密码,修改密码,报警。
- 2022-08-09 06:17:11下载
- 积分:1
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VHDL实现ALU的源代码,并且提供了一个详细的testbench!
VHDL实现ALU的源代码,并且提供了一个详细的testbench!-ALU VHDL source code, and provide a detailed testbench!
- 2022-03-12 21:14:39下载
- 积分:1
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234
在接收信号的数字化、软化的实现中,数字下变频起着重要的作用。本文首先介绍了数字下
变频的组成结构,然后详细分析了数字下变频的工作原理,描述了在实现数字下变频时,设计方案所
采用的高效滤波器———CIC 滤波器和多相抽取滤波器的结构和原理。最后,用通过Simulink 对数字
下变频的性能进行了仿真。在仿真的基础上使用Insight 公司的FPGA 开发系统,用测试电路实测了
数字下变频的性(In the receiving digital signal, softening the realization, the digital down-conversion plays an important role. This article first introduced the digital down conversion of the composition, and then a detailed analysis of digital down conversion of the working principle described in the realization of digital down conversion, the design used in high-performance filters--- CIC filters and multi-phase extraction filter structure and principle. Finally, with the adoption of Simulink for digital down-conversion performance of the simulation. In the simulation based on the use of Insight s FPGA development system is measured using the test circuit of the digital down-conversion of)
- 2021-03-16 21:29:21下载
- 积分:1