基于VHDL的LED显示控制程序

说明：  基于fpga的ad采样程序 可控制ad9226对信号进行采样(Ad9226 signal sampling can be controlled by ad9226 sampling program based on FPGA)

verilog jtag源码及原理，还有debug模块。边界扫描等(verilog jtag source and principle, as well as debug module. Boundary-Scan, etc.)

It is then register ( shifter) PISO ( Parallel - in, serial - out)-It is then register ( shifter) PISO ( Parallel- in, serial- out)

关于FFT实现的Verilog代码，(FFT realize on the Verilog code,)

vga显示彩色图像ip，alter开发板-vga display color image,vhdl,quartus

VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.(SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the )

AD9910实现脉冲内线性调频信号，仅供参考(AD9910 to achieve linear FM pulse signal, for reference only)

脉冲多普勒雷达回波信号相干积累的VHDL源程序-pulse Doppler radar echo signal coherent accumulation of VHDL source

各种常用模块的VHDL描叙实例，PDF格式-various modules used VHDL depicts examples, PDF format