-
DDR SDRAM information, interested to see friends down under
DDR SDRAM的资料,有兴趣的朋友可以下下来-DDR SDRAM information, interested to see friends down under
- 2022-07-22 04:07:30下载
- 积分:1
-
VHDL语言基本数学运算库
VHDL语言基本数学运算库-VHDL basic arithmetic library
- 2022-03-03 06:03:30下载
- 积分:1
-
SPI_DAC
使用VHDL语言实现了FPGA与DAC5688进行SPI通信更改寄存器值(The FPGA using VHDL language with the DAC5688 SPI communication to change the register value)
- 2011-10-23 21:14:45下载
- 积分:1
-
fifo
说明: FPGA的fifo与dsp的emif接口测试程序(EMIF interface test program for FIFO and DSP of FPGA)
- 2020-12-03 16:59:25下载
- 积分:1
-
data_rom
正弦信号发生器,用VHDL来完成,抗干扰能力较强,(Sinusoidal signal generator, using VHDL to accomplish, a strong anti-interference ability,)
- 2009-07-15 22:44:02下载
- 积分:1
-
Verilog HDL 135例指南:Verilog HDL语言类似于C语言,以…
verilog hdl教程135例:verilog hdl语言类似于C语言,便于学习。本文档带有源代码,3-6章-Verilog HDL 135 cases Guide : Verilog HDL language similar to the C language, to facilitate learning. This document with the source code, 3-6
- 2022-09-27 03:05:03下载
- 积分:1
-
4通道12位AD芯片 AD7862控制模块,VHDL源代码,适于单次转换采样,250K采样率....
4通道12位AD芯片 AD7862控制模块,VHDL源代码,适于单次转换采样,250K采样率.-4-channel 12-bit AD chip AD7862 control module, VHDL source code, suitable for single conversion sampling, 250K sampling rate.
- 2022-04-20 03:37:20下载
- 积分:1
-
Quartus
QuartusII多路选择器,数字电路环境,大三EDA技术实验(Quartus,chosen conductos in matheathics field)
- 2012-10-30 16:26:11下载
- 积分:1
-
数字计时器,使用VHDL语言编写,使用数码管显示,精确到ms
数字计时器,使用VHDL语言编写,使用数码管显示,精确到ms-digital timer, the use of VHDL development, the use of digital control, the precision of the ms
- 2022-05-20 00:23:22下载
- 积分:1
-
cordic
基于VHDL语言编写,可下载到FPGA板子上实现的cordic算法实现的设计,并用该算法实现sin和cos的计算,计算结果显示在数码显示管上,已包含按键防抖动功能的实现。(Based on VHDL language, can be downloaded to the the cordic algorithm implemented in the FPGA board to achieve the design and calculation of sin and cos using this algorithm, the results displayed on the digital display tube is included on the function of the realization of the button shake.)
- 2013-03-21 16:52:41下载
- 积分:1