超大规模集成电路的VHDL基本编码…………

TIMING LEARNING -TIMING LEARNING

印制线路板设计经验点滴-Printed Circuit Board Design Experience

实施256点，

说明：  运用VHDL描述函数发生器的各个波形，可有构成多功能函数发生器。(VHDL description of the use of various function generator waveforms, can constitute a multi-purpose function generator.)

真是基于matlab的QPSK，格雷码，瑞利衰减信道，加性高斯白噪声仿真(Really based on matlab QPSK, Gray code, Rayleigh fading channel additive white Gaussian noise simulation)

这个文件中是UltraEdit的一些格式化文件说明 由于原来的 UltraEdit 不支持 HDL 语言的格式化显示，把文件解压得到的 wordfile.txt替换其安装目录下的 wordfile.txt 文件即可-This document is formatted UltraEdit document describes some of the original UltraEdit as a result of HDL does not support formatting language shows that the document received decompression wordfile.txt replace its installation directory under the document can wordfile.txt

ADS7844 AD转换芯片的VHDL控制器-ADS7844 AD converter chip VHDL controller

用状态机实现密码锁State machine used to achieve code lock-State machine used to achieve code lock

用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机。-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine.

简易函数发生器，能产生正弦波，三角波，梯形波，方波，并且可调频率和幅度值。(Simple function generator can produce sine, triangle wave, trapezoidal wave, square wave, and the adjustable frequency and amplitude values.)