16点FFT的VHDL源代码，快速傅里叶变换的xfft16（FFT）计算核心…

一种基于FPGA的CPU设计-FPGA-based CPU design ........

说明：  spi通用串行总线，4线控制，可读写操作(SPI universal serial bus, 4-wire control, readable and writable operation)

VHDL Code For Full Adder By Data Flow Modelling

多通道连续声发射数据采集，每个通道最大5M，采用verilog编程，内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)

一个精确的到0.01s的时钟源程序，对于初学VHDL理解很有帮助，只给了源程序没有给出仿真波形-An accurate clock source to the 0.01s for the beginner to understand VHDL helpful not only to the simulation waveform of the source

数字秒表的实现，我还写个具体的过程要求等，(there is function of clock,it very useful)

使用verilog在fpga开发板实现流水灯，包括整个工程文件(This code is used for early learners to study verilog。)

control stepper motor by fpga card with vhdl program

verilog描述的基于LMS的自适应噪声消除器ANC算法。用于数字音频处理。(The verilog Description LMS-based adaptive noise canceller ANC algorithm. For digital audio processing.)

基于EDA技术中的对LED扫描电路的实验，程序能成功运行，能直接在开发板上看实验结果(EDA-based LED technology to scan the experimental circuit, the program can run successfully, can see directly in the development of on-board results)