verilog实现的“六进制约翰逊计数器”。

ac97 VHDL core

Verilog经典教程，很好的学习Verilog的书籍，对学习硬件编程很有帮助。(Verilog classic handbook, good learning Verilog books, to learn hardware programming helpful.)

Xilinx FPGA using leftover multipliers and block RAM

ODBC编程实例，使用ODBC对基于开关量数据采集卡的通信接口设计与实现。(ODBC programming examples, using ODBC for data acquisition card based digital communications interface design and implementation.)

说明：  isa MEMORY PLAN eu biu asm

说明：  用于读取海德汉绝对位置编码器的位置数据。ENDAT2.1接口(Read the data from ENDAT2.1)

AD9268的配置Verilog实现，程序用于实现4通道的AD9268的配置(The 4 channel AD9268 configuration)

基于fpga与verilog语言的的sdram读写(SDRAM reading and writing based on FPGA and Verilog language)

cpld 控制 8-32M sdram 控制器 maxII epm570实现。-CPLD control 8-32M sdram controller maxII epm570 realize.

Digital pre-distortion (DPD) is an advanced digital signal-processing technique that mitigates the effects of power amplifier (PA) nonlinearity in wireless transmitters. DPD plays a key role in providing efficient radio digital front-end (DFE) solutions for 3G/4G basestations and beyond. Modern FPGAs are a promising target platform for the implementation of flexible wireless DFE solutions, including DPD.