计数器 0 到 9999

mdio配置BCM5461，实现PHY初始化及通信相关寄存器的配置(mdio configure PHY)

一个基于fpga的源程序，对于初始接住的人来说很有帮助-FPGA-based source for the initial very helpful for those who catch

FPGA编写环境，具有仿真容易，软件内存小的特点(FPGA authoring environment, with easy simulation software features small memory)

基于FPGA的TLC2543控制器,采用状态进行控制ADC进行转换(The TLC2543 controller based on FPGA, using state control of ADC conversion)

可以直接用于工程应用的crc校验VHDL编码 里面有详细的规格书-Can be directly used for engineering applications of CRC checksum inside VHDL code has detailed specifications

System Verilog for design verification

光纤发送接收模块，verilog编写，主要用于光纤的发送和接收，波长1310nm(Fiber optic transmitter receiver module, verilog written primarily for transmitting and receiving the optical fiber, wavelength 1310nm)

海德汉绝对式编码器代码，VHDL语言编写(Heidenhain absolute encoder code, VHDL language)

对于中断技术有非常详细的讲解，带图片完整版(Technology for the interruption of a very detailed explanation, with pictures full version)

数字钟vhdl主要分为正常显示与报时功能(Digital clock vhdl)