基于sopc ep2c5开发板的液晶字符显示例程

基于EPM1270的VGA显示器接口源码Verilog-Based on the EPM1270

this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural -this project is based on 8*3 encoder and 3*8 decoder using vhdl.this is the 100 correct code,reference is taken from book digital electrionics written by anand kumar.please use quatrus to access this code.this code can be used for the final year project for engineering. Here dataflow techniques and behavioural

基于VHDL的电子秒表的设计，使用VHDL语言描述一个秒表电路，利用QuantusII软件进行源程序设计，编译，仿真，最后形成下载文件下载至装有FPGA芯片的实验箱，进行硬件测试，要求实现秒表功能。(Design of electronic stopwatch based on VHDL)

基于VHDL开发的自动售货机系统，可实现自动售货过程中的基本功能，具有一定的代表性。-VHDL-based development of a vending machine system which can automatically process the basic functions of sales, with a certain representativeness.

实验用16位全加器的VHDL代码，适合初学者学习，数电学习的好工具。 (Experiment with 16-bit full adder VHDL code for beginners to learn, a good tool to learn a few power.)

说明：  用FPGA完成256*8的存储器的读写操作( complete reading and writing 256* 8 memory with FPGA )

DDS 产生正弦信号，OOK，AM三种波形。 使用xilinx FPGA VHDL(DDS. Resulting in sinusoidal signal, OOK, AM three waveforms. Using xilinx FPGA VHDL.)

32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32/route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only

基于FPGA和Matlab的均衡滤波器设计与实现 基于MATLAB的数字均衡器的设计 采用FPGA实现基于LMS算法的自适应均衡器的设计研究 PWM控制的FPGA实现 等众多与FPGA、MATLAB相关的滤波器和均衡器设计 ( FPGA and MATLAB design of filter&EQ)

verilog，4、5分频器，5分频器占空比3：2-Verilog, 4,5 dividers, five dividers ratio of 3:2