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shuzi
讲述了全数字信号发生器部分频率值测算的表格(Full digital signal generator frequency value calculation form
)
- 2011-12-17 00:55:01下载
- 积分:1
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Advanced-FPGA-Design
高级FPGA设计__结构、实现和优化,中文翻译版(Advanced FPGA Design- Architecture, Implementation, and Optimization)
- 2021-04-01 11:09:08下载
- 积分:1
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FIR滤波器的VHDL语言实现
FIR滤波器的VHDL语言实现-The implement of FIR Filter based on VHDL
- 2022-01-24 13:17:20下载
- 积分:1
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VGA_yanse
用fpga实现VGA16色真彩的图片显示,且在AX301实验板上已经调试过(VGA16 achieve true color with fpga pictures show, and in the AX301 has been tuned breadboard)
- 2021-02-05 17:59:57下载
- 积分:1
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Digital Cymometer VHDL procedures and simulation of the file name: plj.vhd.
数字频率计VHDL程序与仿真
文件名:plj.vhd。
--功能:频率计。具有4位显示,能自动根据7位十进制计数的结果,自动选择有效数据的
--高4位进行动态显示。小数点表示是千位,即KHz。
-Digital Cymometer VHDL procedures and simulation of the file name: plj.vhd.- Function: frequency meter. With four shows that will automatically count seven decimal results, automatic selection of effective data- four for the high dynamic display. Decimal point that is 1000, or KHz.
- 2022-08-04 07:22:59下载
- 积分:1
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sdr_sdram
文章详细讲述了sdr_sdram控制器的使用和编程思想(sdr_sdram)
- 2009-06-11 01:48:25下载
- 积分:1
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串口中断_niosII.rar
解压密码:www.21control.com
串口中断_niosII.rar
解压密码:www.21control.com
- 2023-01-05 21:10:04下载
- 积分:1
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PWM
采用STC89C52单片机的定时器以实现两路PWM波输出,占空比、频率可调(Microcontroller timer used to achieve STC89C52 two PWM wave output, duty cycle, frequency adjustable)
- 2021-04-24 10:08:47下载
- 积分:1
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一个可综合的同步FIFO的verilog源代码
一个可综合的同步FIFO的verilog源代码-An integrated synchronous FIFO in Verilog source code
- 2022-03-26 05:23:42下载
- 积分:1
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Chapter11-13
第十一章到第十三章的代码
本书通过100多个模块实例,详细地讲解了Verilog HDL程序设计语言,全书共分13章,内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等,实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench,所举实例具有很强的实用性和代表性,每个实例均给出了介绍、功能分析、程序代码和结果演示。(Chapter XI to the 13th chapter of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.)
- 2009-11-17 13:57:09下载
- 积分:1