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FFT_FPGA_Verilog-master
xilinx ise开发环境中fft IP核调用,仿真(Xilinx ise development environment FFT IP core call, simulation)
- 2018-07-08 23:28:46下载
- 积分:1
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这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章,实用性很强的,在这里也感谢这篇文章的作着...
这是一篇介绍用verilog语言实现viterbi译码和rake接收机的文章,实用性很强的,在这里也感谢这篇文章的作着-This is a description language with verilog viterbi decoding and rake receiver of the article, very practical, here are grateful for this article was
- 2022-05-13 15:53:30下载
- 积分:1
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23
说明: 基于FPGA的液晶显示控制器的设计,FPGA用的是EP2C5,LCD用的是ST7920内核的122*32点阵的LCD,显示中西文字符(FPGA-based LCD display controller design, FPGA is used EP2C5, LCD is used in the ST7920 core of 122* 32 dot matrix LCD, display of Chinese and Western characters)
- 2009-06-19 22:01:23下载
- 积分:1
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傅里叶变化
快速付里叶变换子程序所需 RAM 空间以输入的首地址为基址,向增加的方向扩展(Fast Fourier Transform subroutine RAM space required to input the first address of the site was to increase the direction of expansion)
- 2005-08-03 16:04:51下载
- 积分:1
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内有LED译码器,汉明纠错译码器,地址译码器,最高优先译码器,双2-4译码器等VHDL的源代码...
内有LED译码器,汉明纠错译码器,地址译码器,最高优先译码器,双2-4译码器等VHDL的源代码-decoder, Hamming error correction decoder, address decoder, the highest priority decoder, dual 2-4 decoder such as VHDL source code
- 2022-12-30 11:40:03下载
- 积分:1
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This application note explains the process of eveloping and debugging a hardware...
This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.-This application note explains the process of eveloping and debugging a hardware abstraction layer (HAL) software device driver, to aid device driver development for the HAL of the Altera Nios® II system. The various software development stages are illustrated using the Altera_Avalon_UART as an example hardware device, and an example of a HAL software device driver called my_uart.
- 2022-01-23 11:16:04下载
- 积分:1
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《HELLO FPGA》-软件工具篇
说明: 学习使用quartus modelsim(learn to uee quartus modelsim)
- 2020-03-18 09:24:22下载
- 积分:1
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用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。...
用VHDL硬件描述语言开发的miniUART接口IP Core,用户可以将其嵌入到自己的FPGA模块中。-VHDL hardware description language developed by miniUART Interface IP Core, Users can be embedded into their own FPGA module.
- 2022-10-05 02:20:03下载
- 积分:1
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Verilog HDL编写的CPU模型,很经典,比较通用
Verilog HDL编写的CPU模型,很经典,比较通用-Verilog HDL prepared by the CPU model, classic, more generic
- 2022-03-21 08:58:27下载
- 积分:1
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ads7846
四线电阻式触摸屏,ads7846控制显示触摸坐标(Four-wire Resistive Touch Panel, ads7846 touch control display coordinates)
- 2009-03-31 20:07:16下载
- 积分:1