VHDL language procedures, functions as follows: What is the keyboard input, in t...

Led灯控制实验用例 目录文件结构： led_test ├─ main.c C语言主源文件 └─ led.c Led灯控制函数源文件(Led lamp control experiment directory file structure use case: led_test ├ ─ main.c C language source file owners └ ─ led.c Led lamp control function source file)

yuv444 与yuv422相互转换verilog语言(yuv444 to yuv422)

几个fpga竞赛的设计例-Several Example FPGA design contest

说明：  用于实现上位机与下位机之间通过RS232协议来进行通讯。(It is used to realize communication between upper computer and lower computer through RS232 protocol.)

介绍了FPGA设计的十大准则，对初学者很有用，对于工作多年的同志，也会有整理总结的好处(Describes the FPGA design of the top ten criteria are useful for beginners, for many years comrades, there will be finishing the benefits of the summary)

cpld/fpga常用加法器设计的verilog程序-cpld/fpga common adder Verilog design procedures

一个开源mips处理器verilog 源码(wishbone interface wishbone interface)

说明：  FPGA 学习实例 动态时钟、面积、速度优化相关代码(Codes related to dynamic clock, area and speed optimization for learning examples of FPGA)

vhdl 计数器源程序，大家看看吧 vhdl 计数器源程序，大家看看吧-vhdl counter source, we see it vhdl counter source, we see it

USB2.0的VHDL描述，很经典了，欢迎大家下载-USB2.0 the VHDL description, very classic, and welcomes everyone to download