VHDL语言实现PWM信号，非常方便的使用

一个开源mips处理器verilog 源码(wishbone interface wishbone interface)

说明：  在zedboard上运行的神经网络架构，方便移植。(Run lenet-5 on zedboard)

基于VHDL的RS232通讯程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用-VHDL based on the RS232 communication procedures, including complete source code, locking pin, as well as download files documents can be directly downloaded using

说明：  一款verilog设计的SRAM控制器，可以实现AHB总线控制的功能。(abcdefghijklmnopqrstuvwxyz)

VGA图象显示控制器设计,实现在VGA显示器上显示图象.-VGA image display controller designed to achieve the VGA display shows images.

FPGA功耗分析工具EPE用于分析FPGA系统的功耗(FPGA power analysis tools EPE is used to analyze the power consumption of the FPGA system)

SystemVerilog For Design (Springer-2nd_Ed-2006)

这是用Verilog写的RS485通信程序，可以使用，希望大家能够互相交流，(This is a Verilog writing RS485 communication program, can be used, I hope we can communicate with each other,)

vhdl,十进制加减计数器，输出计数序列信号-vhdl, decimal addition and subtraction counter, the output count sequence signal

使用Verilog语言对128点 基8FFT的实现(Implementation of 128-point basis 8FFT)