光栅尺的四细分和辩向电路，并具有计数器功能，利用Quartus综合，可以参考...

Verilog code of SPI configurator for DAC AD7394 and AD7395

一款介绍Soc使用的PDF文档供大家看和实践，还是有一定参考价值的！-A description Soc using PDF documents for everyone to see and practice, there are still some reference value!

Universal Shift Register

VHDL与Verilog的比较-VHDL and Verilog comparison

说明：  一个简单的键盘接口模块程序，对键盘输入的数据和时钟信号进行过滤。过滤后的数据信号PS2Df将被送入两个11位移位寄存器中(A simple keyboard interface module program filters keyboard input data and clock signals. The filtered data signal PS2Df will be fed into two 11-bit displacement registers.)

DDR3 控制器，axi4_full 模式， burst长度为16，应用于xilinx平台。(DDR3 interface controller， axi4_full working mode with burst length 16, can operate on the xilinx platform.)

DDS Verilog 代码。包含英文文档说明-DDS Verilog code. Containing the English documentation

基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码，其功能主要有：时间设置，时间显示，跑表，分频，日期设置，日期显示等-FPGA-based multi-functional Digital Clock Design and Implementation of typhoons and rainstorms are detailed Verilog HDL source code, its functions include: time settings, time display, stopwatch, frequency, date setting, date display

FPGA的仿真实例，Verilog代码编写，过程详尽，代码易懂。-FPGA simulation examples, Verilog coding, the process in detail, code easy to understand.

说明：  basic verilog code on siso, piso, sipo