多进制数字频率调制(MFSK)系统VHDL程序

256字节深度的RS232串口程序,共分4个模块,顶层文件FIFO程序串口收和串口发.经过测试已用于产品.可靠!-Depth of 256-byte Serial RS232 procedures, divided into four modules, top-level document procedures FIFO serial and serial-fat collection. After the test has been used in products. Reliable!

产生高斯最小相移键控信号的阐述仿真，包括调制解调、信道模型等。(Simulation program to realize GMSK transmission system)

维特比译码器，调用IP核，软判决输入，开发平台Xilinx Spartan-6系列FPGA(viterbi decoder, using IP core resource, soft decision input,develop platform is Xilinx Spartan-6 series FPGA)

本演示使用VGA输出和DVD播放器播放视频和音频输入

说明：  sd卡的verilog代码，包含一些sd卡例程(SD card Verilog code, including some SD card routines)

3g-sdi驱动器，用于全高清视频FPGA解决方案(3g-sdi driver)

verilog 语言写的FPGA内部实现硬件浮点乘法器的源码，两个时钟周期完成一次浮点乘法运算(The FPGA language written in Verilog implements the source of the hardware floating point multiplier, and completes the floating point multiplication operation in two clock cycles.)

这是用Verilog写的RS485通信程序，可以使用，希望大家能够互相交流，(This is a Verilog writing RS485 communication program, can be used, I hope we can communicate with each other,)

完成cmos摄像头对图像的捕捉，然后进行拼接通过USB进行传输。(complete picture capture)

这是一个HDB3的译码器，实现从HDB3双极性码到高低电平二值序列的转化-This is a decoder of the HDB3, HDB3 bipolar from high-low-level code to the conversion of binary sequences